The quest to fabricate more and more devices in a minimum Silicon space has been ON since J. K and R. Noyce invented the first ICs. This quest has enabled scientific community to cross various technological frontiers. Sustained efforts to put more and more transistors on a wafer have led us to nanotechnologies.
In the commonly used electronic technology, the semiconductor chips (also known as bare-dice) are individually mounted on a package, and wire-bonded to its I/O pins. This package is then mounted on a Printed Circuit Board (PCB). However, not only does packaging of single chip ICs cost more than the cost of the chips they contain, packaging of a chip take relatively large amount of physical space. Using a conventional single chip package and circuit board interconnect strategy, the package and interconnects took up over 50% of the timing budget as well.
However, there is an emerging technology where several bare die chips are mounted on a single package. This technology is known as Multi-Chip Module (MCM) technology. It can be used for both standard and ASIC chips. The resulting package can then be soldered on a PCB.

Although different from MCM, Chip-on-Board (COB) and Flip-Chip technologies are generally considered as related technologies. In COB technology, a semiconductor chip is placed directly on a PCB, eliminating the packaging step thereby, COB comprises of bare dice on organic laminate substrates, such as FR4, along with other SMT devices, both packaged devices and discrete components.
In the Flip-Chip technology, the chip is mounted upside-down (metal contacts down), providing a direct electrical connection to the I/O pads, eliminating the wirebonding step.